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 REFERENCE DESIGN
International Rectifier
IRDCIP1001-B
* 233 Kansas Street, El Segundo, CA 90245 USA
IRDCIP1001-B, 200kHz to 300kHz, 20A, 5VIN to 12VIN Single Phase Synchronous Buck Converter using iP1001
Overview
In this document, Table 1 and Figure 1 are provided to enable engineers to easily evaluate the iP1001 in a single phase configuration that is capable of providing up to 20A in a lab environment without airflow. Figures 3, 4, 5 and 6 and the complete bill of materials in Table 2 are provided as a reference design to enable engineers to very quickly and easily design a single phase converter. In order to optimize this design to your specific requirements, refer to the iP1001 data sheet for guidelines on external component selection and user adjustable limits and specifications for the iP1001. Custom designs may require layout modifications.
Demoboard Quick Start Guide
Initial Settings:
IRDCIP1001-B De m oboa rd Ope ra tng Conditions Min Ma x V IN 4.5V 12V V OU T 0.925V 3.3V I OU T Se e Fig.1
The output is set to 1.3V, but can be adjusted from 0.925V to 2.0V by setting SW1 according to the VID codes provided in Table 1. The output voltage can be adjusted to allow up to 3.3VOUT by adding R3 & R4 with the DAC set to 2VOUT. Refer to equation 1 for R3 & R4 values. R4 should be removed for output voltages below 2V, and R3 should be set to zero ohms (see Table 2). The switching frequency is centered around 300kHz with the Freq pin floating. The input voltage range can be extended below 5VIN by populating the mini-boost circuit on the demo board. Refer to IRDCiP1001-A reference design documentation for direction on changing the configuration of the demo board.
Procedure for Connecting and Powering Up Demoboard:
1. Apply input voltage (5V - 12V) across VIN and PGND. The input voltage (VIN) pin and logic power pin (VDD) are provided as separate inputs. For 5VIN operation only, the VIN and VDD pins can be connected together. For logic power (VDD), connect 5V power source across +5V (TP1) and PGND (TP2). 2. Apply load across VOUT pad and PGND pad. 3. The ENABLE pin is controlled via switch 8 on SW1. This pin is supplied in low state. Once pulled high the output is enabled. 4. Adjust load accordingly.
IRDCIP1001-B Recommended Operating Conditions
(refer to the iP1001 datasheet for maximum operating conditions) Input voltage: 4.5 - 12V (VDD = 4.5V to 5.5V) Output voltage: DAC selectable between 0.925V - 2.0V (with extended operating range to 3.3V with R3 & R4) Output current: Up to 20A depending on duty factor (refer to load line curve in Fig. 1). Switching Freq: 200kHz or 300kHz selectable.
09/11/02
IRDCIP1001-B
25 20
VIN = 5V to 12V 200kHz/300kHz VIN = 3.3V, 200kHz
15
10
5
0 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3
Fig. 1 - Load line curve
D4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Output Voltage (V) 2.00 1.95 1.90 1.85 1.80 1.75 1.70 1.65 1.60 1.55 1.50 1.45 1.40 1.35 1.30 Shutdown*
D4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
D3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
D2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
D1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
D0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1
Output Voltage (V) 1.275 1.250 1.225 1.200 1.175 1.150 1.125 1.100 1.075 1.050 1.025 1.000 0.975 0.950 0.925 Shutdown*
* Shutdown : Upon receipt of the shutdown code (per VID code table above), both FETs are turned OFF and the output is discharged as it enters UVP fault mode.
Table 1 - PWM IC Voltage Identification Codes For output voltages above the DAC maximum setting of 2V, refer to Equation 1 below to calculate the required resistor values for R3 & R4 (needed in order to achieve the extended output voltage range). Equation 1 : Vout = VF x (1 + R3/R4) where VF is equal to the DAC setting and R4 is recommended to be ~1k 2 www.irf.com
IRDCIP1001-B
96% 94% 92% Efficiency 90% 88%
5Vin, 1.5Vout, 300kHz
TA = 25C
86% 84% 0 5
12Vin, 1.5Vout, 300KHz
10 Output Current (A)
15
20
Fig. 2 - Typical Efficiency vs. Current
Refer to the following application notes for detailed guidelines and suggestions when implementing iP0WIR Technology products:
AN-1028: Recommended Design, Integration and Rework Guidelines for International Rectifier's iPOWIR Technology BGA Packages This paper discusses the assembly considerations that need to be taken when mounting iPOWIR BGA's on printed circuit boards. This includes soldering, pick and place, reflow, inspection, cleaning and reworking recommendations. AN-1029: Optimizing a PCB Layout for an iPOWIR Technology Design This paper describes how to optimize the PCB layout design for both thermal and electrical performance. This includes placement, routing, and via interconnect suggestions. AN-1030: Applying iPOWIR Products in Your Thermal Environment This paper explains how to use the Power Loss and SOA curves in the data sheet to validate if the operating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product.
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3
IRDCIP1001-B
VIN
5V-12V
C1 10uF 25V TP1
+5V
C2 10uF 25V
C3 10uF 25V
C4 10uF 25V
C5 10uF 25V
C6 10uF 25V
C7 10uF 25V
C8 10uF 25V
C9 C10 10uF 10uF 25V 25V
U1
VDD VIN
VSW
L1 1.06uH
VO
VOS
TP4
VOUT
R1
0
TP3
PGOOD
+5V
1 2 3 4 5 6 7 8
SW1
C11 C12 C13 C14 470uF 470uF 470uF 470uF 6.3V 6.3V 6.3V 6.3V
PGND
C16 0.1F
D1 10MQ040N
PGND
16 15 14 13 12 11 10 9
D4 D3 D2 D1 D0 FREQ ENABLE
iP1001
R3 R4
TP5 R5
ILIM
R7 340K, 1%
VF
R2
VFS GND
SGND
PGND
R6 0 TP2
Fig. 3 - Reference Design Schematic
4
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IRDCIP1001-B
Fig. 4 - Component Placement Top Layer
Fig. 5 - Component Placement Bottom Layer www.irf.com 5
IRDCIP1001-B
IRDCIP1001-B (For operation 5VIN to 12VIN)
Designator Value Part Type Capacitor, 25V, 10%, X5R Capacitor, 6.3V, 20%, Tantalum Capacitor, 50V, 10%, X7R Not Installed Schottky Diode, 40V, 2.1A Not Installed Not Installed Inductor, 16A, 20%, Ferrite Not Installed Resistor, 0 Jumper For <2Vout, Not installed For >2Vout, Resistor, 0 Jumper For <2Vout, Resistor, 0 Jumper For >2Vout see formula for value For <2Vout, Not installed For >2Vout recommend 1k see formula for detail For <2Vout, Resistor, 0 Jumper For >2Vout, Not installed Resistor, 0 Jumper Resistor, 340k , 1% 340k sets for 20A limit. See ILIM formula for other values Not Installed 8-position DIP switch Test Point Not Installed Power Block Not Installed Footprint 1812 7343 1206 D-64 SMT 2716 SMT SMT SMT 1206 1206 1206 SMT Mfr. MuRata Sanyo Novacap International Rectifier Panasonic Isotek Corp Panasonic ROHM C&K Components Keystone Mfr. P/N GRM43-2X5R106K25A 6TPB470M 1206B104K500N 10MQ040N ETQP6F1R1BFA SMT-R000 ERJ-8GEY0R00 MCR18EZHF3403 SD08H0SK 1502-2 iP1001 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 10.0uF C11 C12 C13 C14 C16 C15, C17, C18, C19, C20, C21 D1 JP1, JP2, JP3 JP1-1, JP2-1, JP3-1 L1 L2 R1 R2 R3 R4 R5 R6 R7 R8, R9 SW1 TP1 TP2 TP4 TP5 TP3 U1 U2 470uF 0.100uF 40V 1.06uH 0 0 340k -
SSBGA International Rectifier 14mmx14mm -
Table 2 - Reference Design Bill of Materials
Adjusting the Current Limit
Current Limit Resistor Rlim in kOhms
900 800 700 600 500 400 300 200 100 0 6 11 16 21 26 31 36 Typical Current Limit Setting in Amps
Fig. 6 Current Limit Adjustment using RLIM
Use of this design for any application should be fully verified by the customer. International Rectifier cannot guarantee suitability for your applications, and is not liable for any result of usage for such applications including, without limitation, personal or property damage or violation of third party intellectual property rights. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: ++ 1 310 252 7105 Technical Assistance Center (TAC) Fax : ++ 1 310 252 7903
6
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